Conventional methods for operating power amplifiers at powers less than their maximum power always cause inefficiency and nonlinearity. Additionally, conventional methods lose accuracy (in both the real and imaginary planes) over the desired bandwidth as the power is reduced below the maximum power of the power amplifier.
FIG. 1 illustrates a conventional power amplifier (PA) configuration. The maximum output power is determined by the collector (or drain) voltage and the load. Specifically, maximum output power for an ideal amplifier is calculated by the following equation. Equation (1): Poutmax=Vcc2/(2×RL). Poutmax is the maximum output power, Vcc is the power supply voltage, and RL is the load resistance.
FIG. 2 illustrates that a maximum efficiency of 70% for an exemplary conventional power amplifier will occur at maximum output power of about 30 dBm. As output power is reduced (“backed off” while holding both Vcc and Rload constant) to 24 dbm, the efficiency is reduced to about 18%. This greatly reduced efficiency is a costly problem.
Conventional methods (to maintain efficiency as output power is reduced) include decreasing the maximum output power by decreasing Vcc and/or by increasing RL. These conventional methods have many drawbacks. For example, controlling and decreasing Vcc is difficult and expensive, and does not reduce the active area of the power amplifier.
Another conventional method is provided by the publication “Fully Integrated CMOS Power Amplifier with Efficiency Enhancement at Power Back-Off,” by Gang Liu et. al., IEEE Journal of Solid State Circuits, Vol. 43, No. 3, March 2008. In this conventional solution, one of the differential pairs of a series combined transformer is shut off. Unfortunately, the additional circuitry and switching elements required inherently add loss to the circuit, reduce efficiency, and increase expense. Further, the primary capacitance and the secondary capacitance of the series combined transformer will have to be modified.
Many other conventional methods have been proposed, but none work well.
The goals are to operate efficiently in a reduced power mode while maintaining linearity over the same bandwidth as a nominal “high power” mode.